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features ? low-voltage and standard-voltage operation ?v cc = 1.7v to 5.5v ? user-selectable internal organization ? 2k: 256 x 8 or 128 x 16 ? 4k: 512 x 8 or 256 x 16 ? three-wire serial interface ? sequential read operation ? 2mhz clock rate (5v) ? self-timed write cycle (5ms max) ? high reliability ? endurance: one million write cycles ? data retention: 100 years ? 8-lead jedec soic, 8-lead tssop, 8-lead udfn, 8-lead xdfn, and 8-ball vfbga packages description the atmel ? at93c56b/66b provides 2048/4096 bits of serial electrically erasable pro- grammable read-only memory (eeprom) organized as 128/256 words of 16 bits each (when the org pin is connected to v cc ) and 256/512 words of 8 bits each (when the org pin is tied to ground). the device is optimized for use in many industrial and commer- cial applications where low-power and low-voltage operations are essential. the at93c56b/66b is available in space-saving 8-lead jedec soic, 8-lead tssop, 8-lead udfn, 8-lead xdfn, and 8-ball vfbga packages. the at93c56b/66b is enabled through the chip select pin ( cs ) and accessed via a three-wire serial interface consisting of data input (di), data output (do), and shift clock (sk). upon receiving a read instruction at di, the address is decoded and the data is clocked out serially on the data output pin, do. the write cycle is completely self-timed, and no sep- arate erase cycle is required before write. the write cycle is only enabled when the part is in the erase/write enable state. when cs is brought high following the initiation of a write cycle, the do pin outputs the ready/busy status of the part. the at93c56b/66b operates from 1.7v to 5.5v. figure 0-1. pin configurations pin name function cs chip select sk serial data clock di serial data input do serial data output gnd ground vcc power supply org internal organization nc no connect vcc nc org gnd cs sk di do 1 2 3 4 8 7 6 5 8-ball vfbga bottom view 1 2 3 4 8 7 6 5 cs sk di do vcc nc org gnd 8-lead soic 1 2 3 4 8 7 6 5 cs sk di do vcc nc org gnd 8-lead tssop vcc nc org gnd cs sk di do 8-lead udfn bottom view 1 2 3 4 8 7 6 5 vcc nc org gnd cs sk di do 8-lead xdfn bottom view 1 2 3 4 8 7 6 5 three-wire serial electrically erasable programmable read-only memory 2k (256 x 8 or 128 x 16) 4k (512 x 8 or 256 x 16) atmel at93c56b atmel at93c66b 8735a?seepr?1/11
2 8735a?seepr?1/11 atmel at93c56b/66b 1. absolute maximum ratings* figure 1-1. block diagram note: when the org pin is connected to v cc , the x 16 organization is selected. when it is connected to ground, the x 8 organization is selected. if the org pin is left unconnected and the application does not load the input beyond the capability of the intern al 1m ? pull-up resistor, then the x 16 organization is selected. operating temperature ????????????????????????? 55 ? c to +125 ? c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. storage temperature ???????????????????????????? 65 ? c to +150 ? c voltage on any pin with respect to ground ??????????????????????????? ? 1.0v to +7.0v maximum operating voltage. . . . . . . . . . . . . . . . . . . . 6.25v dc output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0ma org di cs sk vcc gnd address decoder output buffer data register mode decode logic clock generator do memory array 256/512 x 8 or 128/256 x 16
3 8735a?seepr?1/11 atmel at93c56b/66b table 1-1. pin capacitance (1) notes: 1. this parameter is characterized, and is not 100% tested table 1-2. dc characteristics notes: 1. v il min and v ih max are reference only, and are not tested applicable over recommended operating range from t a = 25 ? c, f = 1.0mhz, v cc = +5.0v (unless otherwise noted) symbol test conditions max units conditions c out output capacitance (do) 5 pf v out = 0v c in input capacitance (cs, sk, di) 5 pf v in = 0v applicable over recommended operating range from t ai = -40c to +85c, v cc = +1.7v to +5.5v (unless otherwise noted) symbol parameter test condition min typ max unit v cc1 supply voltage 1.7 5.5 v v cc2 supply voltage 2.5 5.5 v v cc3 supply voltage 4.5 5.5 v i cc supply current v cc = 5.0v read at 1.0mhz 0.5 2.0 ma write at 1.0mhz 0.5 2.0 ma i sb1 standby current v cc = 1.7v cs = 0v 0.4 1.0 a i sb2 standby current v cc = 2.5v cs = 0v 6.0 10.0 a i sb3 standby current v cc = 5.0v cs = 0v 10.0 15.0 a i il input leakage v in = 0v to v cc 0.1 3.0 a i ol output leakage v in = 0v to v cc 0.1 3.0 a v il1 (1) v ih1 (1) input low voltage input high voltage 2.5v ?? v cc ? 5.5v ? 0.6 2.0 0.8 v cc + 1 v v il2 (1) v ih2 (1) input low voltage input high voltage 1.7v ? v cc ? 2.5v ? 0.6 v cc x 0.7 v cc x 0.3 v cc + 1 v v ol1 v oh1 output low voltage output high voltage 2.5v ? v cc ? 5.5v i ol = 2.1ma 0.4 v i oh = ? 0.4ma 2.4 v v ol2 v oh2 output low voltage output high voltage 1.7v ? v cc ? 2.5v i ol = 0.15ma 0.2 v i oh = ? 100a v cc ? 0.2 v
4 8735a?seepr?1/11 atmel at93c56b/66b table 1-3. ac characteristics notes: 1. this parameter is characterized, and is not 100% tested applicable over recommended operating range from t ai = ? 40c to + 85c, v cc = as specified, cl = 1 ttl gate and 100pf (unless otherwise noted) symbol parameter test condition min typ max units f sk sk clock frequency 4.5v ? v cc ?? 5.5v 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 0 0 0 2 1 0.25 mhz t skh sk high time 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t skl sk low time 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t cs minimum cs low time 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t css cs setup time relative to sk 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 50 200 ns t dis di setup time relative to sk 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 100 400 ns t csh cs hold time relative to sk 0 ns t dih di hold time relative to sk 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 100 400 ns t pd1 output delay to 1 ac test 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t pd0 output delay to 0 ac test 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t sv cs to status valid ac test 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 250 1000 ns t df cs to do in high impedance ac test cs = v il 2.5v ? v cc ?? 5.5v 1.7v ? v cc ?? 5.5v 150 400 ns t wp write cycle time 1.7v ? v cc ?? 5.5v 5 ms endurance (1) 5.0v, 25c 1,000,000 write cycles
5 8735a?seepr?1/11 atmel at93c56b/66b table 1-4. instruction set for the atmel at93c56b and atmel at93c66b note: the xs in the address field represent ?don?t care? values, and must be clocked 2. functional description the atmel ? at93c56b/66b is accessed via a simple and versatile three-wire serial communication interface. device operation is controlled by seven instructions issued by the host processor. a valid instruction starts with a rising edge of cs, and consists of a start bit (logic one) followed by the appropriate op code and the desired memory address location. read (read): the read (read) instruction contains the address code for the memory location to be read. after the instruction and address are decoded, data from the selected memory location is available at the serial output pin, do. output data changes are synchronized with the rising edges ofthe serial clock, sk. it should be noted that a dummy bit (logic zero) precedes the 8- or 16-bit data output string. the at93c56b/66b supports sequential read operations. the device will automatically increment the internal address pointer and clock out the next memory location as long as chip select (cs) is held high. in this case, the dummy bit (logic zero) will not be clocked out between memory locations, thus allowing for a continuous stream of data to be read. erase/write enable (ewen): to assure data integrity, the part automatically goes into the erase/write disable (ewds) state when power is first applied. an erase/write enable (ewen) instruction must be executed first before any programming instructions can be carried out. please note that once in the ewen state, programming remains enabled until an ewds instruction is executed or v cc power is removed from the part. erase (erase): the erase (erase) instruction programs all bits in the specified memory location to the logical-one state. the self-timed erase cycle starts once the erase instruction and address are decoded. the do pin outputs the ready/busy status of the part if cs is brought high after being kept low for a minimum of 250ns (t cs ). a logic one at pin do indicates that the selected memory location has been erased and the part is ready for another instruction. write (write): the write (write) instruction contains the 8- or 16-bits of data to be written into the specified memory location. the self-timed programming cycle, t wp , starts after the last bit of data is received at serial data input pin di. the do pin outputs the ready/busy status of the part if cs is brought high after being kept low for a minimum of 250ns (t cs ). a logic zero at do indicates that programming is still in progress. a logic one indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. a ready/busy status cannot be obtained if cs is brought high after the end of the self-timed programming cycle, t wp . erase all (eral): the erase all (eral) instruction programs every bit in the memory array to the logic one state, and is primarily used for testing purposes. the do pin outputs the ready/busy status of the part if cs is brought high after being kept low for a minimum of 250ns (t cs ). the eral instruction is valid only at v cc = 5.0v ?? 10%. instruction sb op code address data comments x 8 x 16 x 8 x 16 read 1 10 a 8 ? a 0 a 7 ? a 0 reads data stored in memory at specified address ewen 1 00 11xxxxxxx 11xxxxxx write enable must precede all programming modes erase 1 11 a 8 ? a 0 a 7 ? a 0 erases memory location a n ? a 0 write 1 01 a 8 ? a 0 a 7 ? a 0 d 7 ? d 0 d 15 ? d 0 writes memory location a n ? a 0 eral 1 00 10xxxxxxx 10xxxxxx erases all memory locations. valid only at v cc = 4.5v to 5.5v wral 1 00 01xxxxxxx 01xxxxxx d 7 ? d 0 d 15 ? d 0 writes all memory locations. valid only at v cc = 5.0v 10% and disable register cleared ewds 1 00 00xxxxxxx 00xxxxxx disables all programming instructions
6 8735a?seepr?1/11 atmel at93c56b/66b write all (wral): the write all (wral) instruction programs all memory locations with the data patterns specified in the instruction. the do pin outputs the ready/busy status of the part if cs is brought high after being kept low for a minimum of 250ns (t cs ). the wral instruction is valid only at v cc = 5.0v ? 10%. erase/write disable (ewds): to protect against accidental data disturbance, the erase/write disable (ewds) instruction disables all programming modes, and should be executed after all programming operations. the operation of the read instruction is independent of both the ewen and ewds instructions, and can be executed at any time. 3. timing diagrams figure 3-1. synchronous data timing note: 1. this is the minimum sk period table 3-1. organization key for timing diagrams notes: 1. a 8 is a don?t-care value, but the extra clock is required 2. a 7 is a don?t-care value, but the extra clock is required i/o atmel at93c56b (2k) atmel at93c66b (4k) x 8 x 16 x 8 x 16 a n a 8 (1) a 7 (2) a 8 a 7 d n d 7 d 15 d 7 d 15
7 8735a?seepr?1/11 atmel at93c56b/66b figure 3-2. read timing figure 3-3. ewen timing figure 3-4. ewds timing cs cs s cs 11 1 s cs cs cs s 1
8 8735a?seepr?1/11 atmel at93c56b/66b figure 3-5. write timing figure 3-6. wral timing (1) note: 1. valid only at v cc = 4.5v to 5.5v s cs cs p 11 a a pe a ce s rea cs s pe a ce s rea 11 cs p
9 8735a?seepr?1/11 atmel at93c56b/66b figure 3-7. erase timing figure 3-8. eral timing (1) note: 1. valid only at v cc = 4.5v to 5.5v s 11 1 cs a cs s p a 1 a a cec sa s sa rea s pe a ce pe a ce s cs 11 pe a ce pe a ce rea s cec sa s sa p cs s
10 8735a?seepr?1/11 atmel at93c56b/66b 4. ordering code detail atmel designator product family device density device revision shipping carrier option package device grade or wafer/die thickness package option 56 = 2k 66 = 4k b or blank = bulk (tubes) t = tape and reel operating voltage m = 1.7v to 5.5v h = green, nipdau lead finish industrial temperature range (-40c to +85c) u = green, matte sn lead finish industrial temperature range (-40c to +85c) 11 = 11mil wafer thickness ss = jedec soic x = tssop ma = udfn me = xdfn c = vfbga wwu = wafer unsawn at93c56b-sshm-b
11 8735a?seepr?1/11 atmel at93c56b/66b 5. part markings 5.1 atmel at93c56b package mark contact: dl-cso-assy_eng@atmel.com drawing no. rev. title lot number aaaaaaa = atmel wafer lot number voltages blank: 2.7v min d: 2.5v min l: 1.8v min m: 1.7v min p: 1.5v min grade/lead finish material u: industrial/matt tin h: industrial/nipdau atmel truncation at: atmel atm: atmel atml: atmel catalog number: at93c56b catalog truncation: 56b date codes y = year m = month ww = work week of assembly 0: 2010 4: 2014 a: january 02: week 2 1: 2011 5: 2015 b: february 04: week 4 2: 2012 6: 2016 ? ? ? ? ? ? 3: 2013 7: 2017 l: december 52: week 52 country of assembly @ = country of assembly b = philippines w = thailand q = malaysia h,y = china trace code xx = trace code (atmel lot numbers to correspond to code) (e.g. xx: aa, ab...yz, zz) 2 rows 56bu @ymxx 2.35x3.73mm 8-ball vfbga - pin 1 1 of 4 and 1 of 5 characters 8 lead udfn - 3 rows of 3 characters 56b hm@ yxx 2.0x3.0mm pin 1 3 rows of 8 characters aaaaaaaa 56bm @ atmlhyww 8 lead soic 3 rows 8 lead tssop aaaaaaa 56bm @ athyww 2 of 6 and 1 of 7 characters 2 rows of 3 characters 56b yxx pin 1 8 lead xdfn - 1.8x2.2mm 93c56bsm a 1/12/11 93c56bsm , at93c56b standard marking information for package offering
12 8735a?seepr?1/11 atmel at93c56b/66b 5.2 atmel at93c66b package mark contact: dl-cso-assy_eng@atmel.com drawing no. rev. title lot number aaaaaaa = atmel wafer lot number voltages blank: 2.7v min d: 2.5v min l: 1.8v min m: 1.7v min p: 1.5v min grade/lead finish material u: industrial/matt tin h: industrial/nipdau atmel truncation at: atmel atm: atmel atml: atmel catalog number: at93c66b catalog truncation: 66b date codes y = year m = month ww = work week of assembly 0: 2010 4: 2014 a: january 02: week 2 1: 2011 5: 2015 b: february 04: week 4 2: 2012 6: 2016 ? ? ? ? ? ? 3: 2013 7: 2017 l: december 52: week 52 country of assembly @ = country of assembly b = philippines w = thailand q = malaysia h,y = china trace code xx = trace code (atmel lot numbers to correspond to code) (e.g. xx: aa, ab...yz, zz) 2 rows 66bu @ymxx 2.35x3.73mm 8-ball vfbga - pin 1 1 of 4 and 1 of 5 characters 8 lead udfn - 3 rows of 3 characters 66b hm@ yxx 2.0x3.0mm pin 1 3 rows of 8 characters aaaaaaaa 66bm @ atmlhyww 8 lead soic 3 rows 8 lead tssop aaaaaaa 66bm @ athyww 2 of 6 and 1 of 7 characters 2 rows of 3 characters 66b yxx pin 1 8 lead xdfn - 1.8x2.2mm 93c66bsm a 1/12/11 93c66bsm , at93c66b standard marking information for package offering
13 8735a?seepr?1/11 atmel at93c56b/66b 5.3 atmel at93c56b ordering information notes: 1. "-b" denotes bulk delivery 2. "-t" denotes tape and reel delivery. soic = 4k/reel. tssop udfn, xdfn, and vfbga = 5k/reel 3. for wafer sales, please contact atmel sales atmel ordering code voltage package operation range at93c56b-sshm-b (1) (nipdau lead finish) at93c56b-sshm-t (2) (nipdau lead finish) at93c56b-xhm-b (1) (nipdau lead finish) at93c56b-xhm-t (2) (nipdau lead finish) at93c56b-mahm-t (2) (nipdau lead finish) AT93C56B-MEHM-T (2) (nipdau lead finish) at93c56b-cum-t (2) (nipdau lead finish) 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 8s1 8s1 8a2 8a2 8y6 8me1 8u3-1 lead-free/halogen-free/ industrial temperature ( ? 40 ? c to 85 ? c) at93c56b-wwu11m 1.7 to 5.5 die sale industrial temperature ( ? 40 ? c to 85 ? c) package type 8s1 8-lead, 0.150" wide, plastic gull wing, small outlinepackage (jedec soic) 8a2 8-lead, 0.170" wide, thin shrink small outline package (tssop) 8y6 8-lead, 2.00 mm x 3.00 mm body, 0.50 mm pitch, ultra thin dual no lead package (udfn) 8me1 8-lead, 1.80mm x 2.20mm body (xdfn) 8u3-1 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, small die ball grid array (vfbga)
14 8735a?seepr?1/11 atmel at93c56b/66b 5.4 atmel at93c66b ordering information notes: 1. "-b" denotes bulk delivery 2. "-t" denotes tape and reel delivery. soic = 4k/reel. tssop udfn, xdfn, and vfbga = 5k/reel 3. for wafer sales, please contact atmel sales atmel ordering code voltage package operation range at93c66b-sshm-b (1) (nipdau lead finish) at93c66b-sshm-t (2) (nipdau lead finish) at93c66b-xhm-b (1) (nipdau lead finish) at93c66b-xhm-t (2) (nipdau lead finish) at93c66b-mahm-t (2) (nipdau lead finish) at93c66b-mehm-t (2) (nipdau lead finish) at93c66b-cum-t (2) (nipdau lead finish) 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 8s1 8s1 8a2 8a2 8y6 8me1 8u3-1 lead-free/halogen-free/ industrial temperature ( ? 40 ? c to 85 ? c) at93c56b-wwu11m 1.7 to 5.5 die sale industrial temperature ( ? 40 ? c to 85 ? c) package type 8s1 8-lead, 0.150" wide, plastic gull wing, small outline package (jedec soic) 8a2 8-lead, 0.170" wide, thin shrink small outline package (tssop) 8y6 8-lead, 2.00 mm x 3.00 mm body, 0.50 mm pitch, ultra thin dual no lead package (udfn) 8me1 8-lead, 1.80mm x 2.20mm body (xdfn) 8u3-1 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, small die ball grid array (vfbga)
15 8735a?seepr?1/11 atmel at93c56b/66b 6. packaging information 8s1 ? jedec soic package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note a1 0.10 ? 0.25 a 1.35 ? 1.75 b 0.31 ? 0.51 c 0.17 ? 0.25 d 4.80 ? 5.05 e1 3.81 ? 3.99 e 5.79 ? 6.20 e 1.27 bsc l 0.40 ? 1.27 ? ? 0 ? 8 ? ? e e 1 1 n n top view t o p v i e w c c e1 e 1 end view a a b b l l a1 a 1 e e d d side view s i d e v i e w 8s1 f 5/19/10 notes: this drawing is for general information only. refer to jedec drawing ms-012, variation aa for proper dimensions, tolerances, datums, etc. 8s1 , 8-lead (0.150? wide body), plastic gull wing small outline (jedec soic) swb
16 8735a?seepr?1/11 atmel at93c56b/66b 8a2 ? tssop package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note d 2.90 3.00 3.10 2, 5 e 6.40 bsc e1 4.30 4.40 4.50 3, 5 a ? ? 1.20 a2 0.80 1.00 1.05 b 0.19 ? 0.30 4 e 0.65 bsc l 0.45 0.60 0.75 l1 1.00 ref side view end view top view a2 a l l1 d 1 2 3 e1 n b pin 1 indicator this corner e e notes: 1. this drawing is for general information only. refer to jedec drawing mo-153, variation aa, for proper dimensions, tolerances, datums, etc. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. dimension e1 does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07mm. 5. dimension d and e1 to be determined at datum plane h. 8a2 e 5/19/10 8a2 , 8-lead 4.4mm body, plastic thin shrink small outline package (tssop) tnr
17 8735a?seepr?1/11 atmel at93c56b/66b 8y6 ? udfn package drawing contact: packagedrawings@atmel.com drawing no. gpc rev. title 8y6 ynz e 11/21/08 8y6 , 8-lead, 2.0x3.0mm body, 0.50mm pitch, ultrathin mini-map, dual no lead package (sawn)(udfn) common dimensions (unit of measure = mm) symbol min nom max note 1.40 ? ? 0.00 ? 0.20 0.20 d e d2 e2 a a1 a2 a3 l e b 2.00 bsc 3.00 bsc 1.50 ? ? 0.02 ? 0.20 ref 0.30 0.50 bsc 0.25 1.60 1.40 0.60 0.05 0.55 0.40 0.30 2 a2 pin 1 index area a3 d e b (8x) pin 1 id a1 a l (8x) e (6x) 1.50 ref. d2 e2 notes: 1. this drawing is for general information only. refer to jedec drawing mo-229, for proper dimensions, tolerances, datums, etc. 2. dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 3. soldering the large thermal pad is optional, but not recommended. no electrical connection is accomplished to the device through this pad, so if soldered it should be tied to ground
18 8735a?seepr?1/11 atmel at93c56b/66b 8me1 ? xdfn common dimensions (unit of measure = mm) symbol min nom max note package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc 8me1 a 8/3/09 8me1 , 8-lead (1.80 x 2.20mm body) extra thin dfn (xdfn) dtp ? 0.00 1.70 2.10 0.15 0.26 a a1 d e b e e1 l ? ? 1.80 2.20 0.20 0.40 typ 1.20 ref 0.30 0.40 0.05 1.90 2.30 0.25 0.35 bottom view top view side view 8 7 6 5 1 2 3 4 d e pin #1 id a1 a pin #1 id e1 b l e b 0.10 0.15
19 8735a?seepr?1/11 atmel at93c56b/66b 8u3-1 ? vfbga package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc 8u3-1 d 07/14/10 8u3-1, 8-ball, 1.50 x 2.00 mm body, 0.50 pitch, vfbga package (dbga2) gxu common dimensions (unit of measure - mm) symbol min nom max note a 0.73 0.79 0.85 a1 0.09 0.14 0.19 a2 0.40 0.45 0.50 b 0.20 0.25 0.30 2 d 1.50 bsc e 2.0 bsc e 0.50 bsc e1 0.25 ref d 1.00 bsc d1 0.25 ref 1. this drawing is for general information only. 2. dimension ?b? is measured at maximum solder ball diameter. 3. solder ball composition shall be 95.5sn-4.0ag-.5cu. notes: a 2 side view a pin 1 ball pad corner top view e d a 1 5. b 8 solder balls bottom view (d1) d 4 3 2 (e1) 6 e 5 7 pin 1 ball pad corner 1 8
20 8735a?seepr?1/11 atmel at93c56b/66b 7. revision history revision no. date comments 8735a 01/2011 initial document release
atmel corporation 2325 orchard parkway san jose, ca 95131 usa tel: (+1) (408) 441-0311 fax: (+1) (408) 487-2600 www.atmel.com atmel asia limited unit 01-5 & 16, 19f bea tower, millennium city 5 418 kwun tong road kwun tong, kowloon hong kong tel: (+852) 2245-6100 fax: (+852) 2722-1369 atmel munich gmbh business campus parkring 4 d-85748 garching b. munich germany tel: (+49) 89-31970-0 fax: (+49) 89-3194621 atmel japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (+81) (3) 3523-3551 fax: (+81) (3) 3523-7581 ? 2011 atmel corporation. all rights reserved. / rev.: 8735a?seepr?1/11 disclaimer: the information in this document is provided in connection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in the atmel terms and conditions of sales located on the atmel website, atmel assumes no liabili ty whatsoever and disclaims any express, implied or statutory warranty relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpo se, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, punitive, special or incidental damages (including, without limitation, damages for loss and profits, business i nterruption, or loss of information) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. atmel does not make any commitment to upda te the information contained herein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel products are not intended, authorized, or warranted for use as components in applica tions intended to support or sustain life. atmel ? , atmel logo and combinations thereof, and others, are registered trademarks or trademarks of atmel corporation or its subsidia ries. other terms and product names may be trademarks of others.

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